Monostable device



Jan. 3, 1956 w. F. sTEAGALL 2,729,754

MONOSTABLE DEVICE Filed Oct. 2'?, 1954 5 Sheets-Sheet 1 FIG. l.

|05 y |06 Set Output |07 ,i e Nc-a f o lol |02 los .L :l NGI Set Input y F E 2 INVENTOR WILL/AM F. STEAGALL ATTORNEY Jan. 3, 1956 w. F. sTEAGALL MONOSTABLE DEVICE Filed OCL. 27, 1954 B A( Flux DensHy) 306 \-305(Saurntlon) Fl G. 3.

H(Mogne1izinq Force) \302 3 Sheets-Sheet 2 IN VENTOR WILL/AM E STEAGALL ATTORNEY Jan. 3, 1956 W. F. STEAGALL MONOSTABLE DEVICE 3 Sheets-$heet I5 Filed Oct. 27, 1954 .PIL

INVENTOR WILL/AM F. STEAGALL i AMP. H6 Il ATTORNEY United States Patent O MON OSTABLE DEVICE William F. Steagall, Merchantville, N. J., assigner to Sperryuiand Corporation, Philadelphia, Pa., a corporation of Delaware Application Uctober 27, 1954, Serial No. 464,979

14 Claims. (Cl. 307-88) This invention relates to improvements in monostable devices and more particularly to that class known as delay -hops, although it is not limited to the latter.

it is desirable in a computer circuit to employ a delay flop for purposes that are well known in the art. For present purposes, a delay flop or pulse stretcher may be thought of as a device which produces an output pulse of measured duration which is longer than the input pulse or which produces a predetermined sequence of pulses with a total time elapse greater than the duration of the input pulse actuating the device. In the past, delay flops have employed vacuum tubes or other similar devices which have had driven certain disadvantages that are overcome by the present invention. Moreover, in connection with computing systems embodying magnetic amplifiers throughout, it is desirable to have a delay flop or the like which possesses characteristics compatible with the remainder of the system. As far as is known, the prior art fails to disclose such a delay flop. There are, however, certain prior applications assigned to the assignee of the present application which disclose delay flops embodying saturable core devices and which are compatible with the computing systems employing magnetic amplifiers. One of these prior applications is that of Robert D. Torrey, now United States application Serial No. 453,833, filed September 2, 1954, entitled Delay Flop.

Another such application is the prior copending application of the present inventor entitled Delay Flop, Serial No. 458,079, filed September 24, 1954.

There are in general two types of delay flops. The resettable delay flop produces an extendable output which continues for a time period T, following an input pulse. if another input pulse arrives during the time period T, the output pulse will be extended a similar time period T following the second input pulse. A non-resettable delay flop is one in which a non-extendable output continues for the time period T following an input signal, but that time period is not extended even though an additional input pulse is received during the time period T. The present invention in its preferred form concerns a nonresettable delay flop, although with modifications obvious to those skilled in the art in View of the present disclosure, it could be revised to form a resettable delay flop.

While the aforesaid prior applications of the present assignee disclose delay iiops embodying magnetic amplifiers which are compatible with computing systems embodying such amplifiers in other portions of the computer, the present invention has within a limited field certain advantages over all of these prior applications of the present assignee. With a limited number of magnetic amplifiers, one is able to secure a greater number of output pulses in response to each input pulse, than there are magnetic amplifiers in the circuit. This distinguishes the results of my circuit over the prior application of Henry W. Kaufmann, entitled Delay Flop, Serial No. 453,981, filed September 3, 1954, which has been assigned to the saine assignee as the present invention. AS for the invention of the other applications of this assignee, the

present circuit has the advantages of improved reliability as well as greater flexibility without unrealistic increase in the number of component parts involved.

It is the primary object of the present invention to provide a delay flop having the characteristics hereinabove mentioned.

It is a further object of the present invention to provide a delay flop that is compatible and may be conveniently used in computer circuits employing magnetic amplifiers.

It is another object of the invention to provide a delay flop of a high order of reliability and, inter alia, which does not use vacuum tubes or other components likely to burn out.

lt is an additional object of the invention to provide a delay flop that has certain advantages, in a limited field, over the delay flops of said prior applications which have been assigned to the present assignee.

lt is still another object of the invention to provide a delay flop that is more reliable in a limited field than the prior art types of delay flops.

An additional object of the invention is to provide a delay fiop which will produce a greater number of output pulses in response to each input pulse than there are magnetic amplifiers in the circuit.

in carrying out the aforesaid objects, there is provided in combination with the set input circuit, two magnetic amplifiers in which the output of each feeds the input of the other, there being a gate in the circuit. As long as the gate is open, a set input pulse will cause feedback to occur mutually between the two magnetic amplifiers whereby they will continue to produce a series of output pulses. The first pulse feedback between these two amplifiers is fed through the primary or" a saturable core reactor which has a core capable of being driven to saturation in continuous or step-by-step fashion. in the present case, the operation will be step-by-step because pulses are applied to the primary winding. lt will require a series of pulses flowing through the primary of this saturable core reactor before the core is saturated, and while this series of pulses is passing through the primary, the aforesaid gate will remain open. However, as soon as the core reaches saturation, the primary of this saturable reactor will have low impedance and a power pulse will go through the primary and cause the aforesaid gate to be closed, which will stop the aforesaid recycling operation, and thus terminate the output pulses from the device. When this large pulse flows through the primary winding following saturation of the core, it also operates a ma netic amplifier which in turn passes a pulse through the secondary winding on the aforesaid transformer and resets the core of the reactor to its original flux density condition or position on its characteristic hysteresis loop so that the whole apparatus is ready to respond to another set input pulse if and when one arrives. Further details of the circuit will appear in the following description.

In the drawings:

Figure 1 is a block diagram of the device constituting my invention.

Figure 2 is a waveform diagram useful in explaining the operation of Figure l.

Figure 3 is an idealized hysteresis loop useful in eX- plaining the operation of the devices of Figures l, 4, 5 and 6.

Figure 4 is a schematic diagram of a non-complementing magnetic amplifier useful in connection with this invention.

Figure 5 is a schematic diagram of a complementing magnetic amplifier useful in connection with this invention.

Figure 6 is a schematic diagram or" one form of the entire circuit constituting my invention.

Referring to Figure l, set input 1G@ feeds any input pulse received thereon through the rectier 101 to the input wire 102 of a non-complementing magnetic amplifier 103. This magnetic amplifier is of the type fed by a series of spaced power pulses of predetermined pliase'relation, in this case phase one, from source 118. The signals applied to input 100 are also each applied as received to the amplifier input 102 during the time interval or space between two successive pulses of source 118. In event a pulse is received in a space between two of the pulses of magnetic amplifier 103, the next pulse from source 118 will be allowed to pass through the amplifier 103 and will appear at the set output 104 and will also be fed to the input of non-complementing magnetic amplifier 105. This latter amplifier is identical with magnetic amplifier 103, the only difference being that it is fed with phase two power pulses from source 119. Phase one power pulses are of opposite phase to those of phase two, being displaced in time by 180. In other words,rthe sources 118 and 119 both produce spaced pulses and the pulses from each source occur during the spaces between thev pulses of the other source, all as shown in the first two horizontal wave diagrams of Figure 2. Since the output of amplifier 103 will appear at the input of amplifier 105 during a space between two pulses of source 119, the pulse from source 119 following the input pulse to amplifier 105 will constitute an output from that amplifier and will appear on wire 106. Assuming that the gate 107 is open and allows this pulse to pass, it will flow through rectifier 108 and back to the input 102 of magnetic amplifier 103. It will arrive during the spaces between two of the pulses of source 118 and cause the latter of these two pulses to appear at the output of 104, as well as at the input of amplifier 105. As a result, the next pulse from source 119 will appear on output lead 106, iiow through the gate 107, the rectifier 108, to the input 102, and causeY the next pulse from source 118 to flow through amplier 103 to the output 104. This recycling operation will continue until some interruption occurs. The remaining apparatus of the circuit is designed to interrupt this recycling after a predetermined number of output pulses following a given input pulse.

Referring to Figure 2, it may be assumed that a set input pulse 200 arrives at terminal 100 during the space between two pulses of source 118, Figure 2A. This will cause an input to magnetic amplifier 103 as shown by pulse 201 in Figure 2D. This input pulse will cause the next pulse 202 of source 118 to appear on wire 104 (see pulse 203 of Figure 2E). The latter pulse will cause the next pulse 204 of source 119, Figure 2B, to appear on wire 106 (see pulse 205 of Figure 2F). The gate 107 produces an output whenever it receives pulses simultaneously from output 106 of amplifier 105 and from output 117 of complementing magnetic amplifier 116. As will appear later, the magnetic amplifier 116'is continuously producing a train of pulses 207, Figure 2l, which appear at the gate 107. Whenever a pulse appears on wire 106 which coincides in time with one of the pulses 207 from output 117, there appears an output at the gate 107. Hence, there will be an output pulse 208, Figure 2l, from the gate 107 because pulse 205 occurred concurrently with one of the pulses 207. This gate pulse 208 will ow through rectifier 108 to the input 102 and will appear there as pulse 209, Figure 2D, at output 104. Pulse 209 will cause the next pulse 210 from source 118 to ow through amplifier 103 to produce pulse 211, Figure 2E, at output 104. Pulse 211 will cause the next pulsel 212 from source 119, Figure 2B, to How through amplifier 105 to produce pulse 213, Figure 2F, at wire 106. Pulse 213 will arrive at gate 107 simultaneously with one of the pulses 207 and therefore the gate 107 will be open and allow a pulse'214, Figure 2D, to flow through rectifier 108 and appear on wire 102 as input to amplifier 103. Pulse 214 will cause the recycling operation to contmue and consequently there will appear pulses 215, 216, 217, 21S, 219, 220, 221 and 222 as shown at' Y Figures 2F, F and D, respectively, following the same reasoning whereby the appearance of pulses 201, 203, 205, 207, 209, 211 and 213 were produced.

It is noted that the first output pulse 203 on wire 104 also passed through rectifier 109, primary winding 110 of reactor 111, resistor 113, to a terminal 114 which is negative relative to ground. If we assume that the iiux density of the core of the reactor 111 was at point 300 on the hysteresis loop of Figure 3 at the time that pulse 203 arrived, the pulse will drive the core along the hysteresis loop for a limited distance, for example, to point 301. The core is made of a material, hereinafter described in more detail, whereby Successive spaced pulses will drive the core in step-by-step fashion along the unsaturated portion of the hysteresis loop until finally saturation is reached. That is to say, the next pulse 211 flowing through the primary winding 110 will drive thev core from a remanent point corresponding to point 301 to point 302 on the hysteresis loop of Figure 3. The third pulse 215 will drive the core from a remanent point corresponding to point 302 to point 303 and the fourth pulse 2718 will drive the core from a remanent point corresponding to point 303 to point 304 on the hysteresis loop. The next pulse 221 will drive the core from point 306, the remanent point corresponding to point 304, to point 305 which is saturation -l-Bs. As long as the core is operating on a substantially vertical portion of the loop, the coils on the core will have high impedance as is now well known. However, when the core reaches saturation, the effective impedance of the windings on the core drops to a much smaller value. That means that during the period of the last pulse to flow through the primary winding 110, pulse 221, the core will be on a substantially horizontal portion of the hysteresis loop and will be saturated. Hence, this pulse 221 will raise the potential of wire 115 to a relatively high positive value and will provide a relatively large input pulse for the first time to the inputs of non-complementing magnetic amplifier 127 and complementing magnetic amplilier 116. The number and character of pulses required to saturate the core of the transformer is a matter of circuit design and is determined by the requirements of the rest of the computer with which the present invention operates.

As stated previously, the complementing magnetic amplifier 116 provides a continuous train of output pulses 207, Figure 2l, coinciding in time with the pulses from source 119, except that during the space following any pulse fed to the input of complementing magnetic amplifier 116, an output pulse will be omitted. As is shown in Figure 2G, when the pulse 223 arrived at the input of complementing magnetic amplifier 116, the output pulse which would normally appear at 224', Figure 2l, is omitted. Hence, at the time period of 224 there will be no output on wire 117 and therefore gate 107 will not allow any ow of current in its output circuit leading to rectifier 108 even though there is a pulse 222 fed to one of its inputs by wire 106. Consequently, there will be no input on wire 102 at time 225 on Figure 2D, and therefore no output on wire 104 at time period 226, on Figure 2E. The apparatus will therefore be restored to its original condition except that the core of transformer 111 is saturated.

The coreV is, however, reset by my device automatically as follows: when the pulse 223 appeared at the input of non-complementing magnetic amplifier 127, that amplifier produced an output pulse 227 in response to the next pulse 228 from source 119. The pulse 227 passed through rectifier 126, secondary winding 112 of reactor 111, and resistor 123 to the source of negative potential 124. This surge of current through the secondary winding 112 was in proper direction and magnitude to flip the core to point 307 of Figure 3. It is noted that following saturation of the core and prior to the arrival of the surge in the secondary 112, the core would return from saturation .teachings of the aforesaid Torrey application.

.point 305 to residual flux density point 306, which corresponds to zero magnetizlng force. The surge of current through secondary winding 112 drove the core negatively from point 306 to point 307 after which the core returned to point 300, representing zero magnetizing force and also a negative residual flux density. The apparatus is now in its original state and is ready to receive another set input pulse.

lt is noted from the foregoing description that in response to a given set input pulse at 100 there will be a predetermined number of output pulses at output 104. This number can be controlled within wide limits by proportioning the length of the pulses, their amplitude, the number of turns on the winding 110, and the core itself so that the desired definite number of power pulses must l'low through the primary winding 110 in order to sattirate the core 111. In order to preclude flow of current through the secondary winding 112 during the passage of pulses through primary 110, the source 122 of blocking pulses is provided in combination with the rectifier 121, the resistor 123 and the negative potential source 124. The source 122 of blocking pulses raises the potential of the junction of rectifier 121 and resistor 123, during the period of each blocking pulse shown in the wave diagram ci Figure 2K. C his increased potential prevents the potential induced in winding 112 by current in winding 110 from producing current in theI secondary Circuit comprising 11.? by blocking rectifier 126.

Although the above describes a transformer 111 with a saturable core as one means oi controlling the number of output pulses, it will be understood that other circuit elements outside the path of the circulating pulse train, but responsive thereto, may be employed to interrupt the pulse train.

It is noted that the delay liop circuit hereinabove described is non-resettable. The set input pulses always arrive at input 100 during the spaces between pulses of power pulse source 118. Following each such set input pulse there will be `a series of output pulses on wire 104. The exact number depends upon circuit design and the requirement of the apparatus with which the invention is to function. it another set input pulse arrives at 100 prior to the time that the recycling operation or" amplifiers 106 and S ceases, the new set input pulse will merely add to one of the pulses already flowing through rectitier 10S to input 102 and will be merely additive to that pulse and may perhaps push the core of ampliiier 103 a little farther toward saturation, but without any change in the operation of the system as a whole. Consequently, the apparatus as shown is non-resettable. could be readily modified to be resettable in view of the That application teaches that a delay flop may be made resettable by including a reset winding on the reactor and connected in series with the set input so that any new set input pulse will revert the core to its original starting condition, in the present case, point 300 on the hysteresis loop ot Figure 3.

The core of transformer 111 as well as of the cores of the several magnetic amplitiers (hereinafter described in more detail) may be made of a variety of materials, among which are the various types of ferrites and the various magnetic tapes, including Orthonil: and 4-79 Moly-permalloy. These materials may have different heat treatments to give them different properties. The magnetic material employed in the core should preferably, though not necessarily, have a substantially rectangular hysteresis loop such as shown in Figure 3. Cores of this character are now well known in the art. In addition to the wide variety of materials available, the core may be constructed in a number of geometries including both closed and open paths; for example, cup-shaped, strips, and toroidal-shaped cores are possible. Those skilled in the art understand that when the core is operating on the horizontal, or substantially saturated, portions of the However, the device hysteresis loop, the core is generally similar in operation to an air core in that the coil on the core is of low etective impedance. On the other hand, when the core 'is operating on the vertical, or unsaturated, portions of the hysteresis loop, the effective impedance of the coils on the core will be high.

Figure 4 is a schematic diagram of one form of noncomplementing magnetic amplifier which may serve as the amplifiers 103, and 127 respectively. The positive power pulses from the square wave source of alternating current 40 pass through rectifier 41, power coil 42, resistor 47, to negative pole 44 which is below ground potential. If we assume that `at the start of the first pulse the core was at point 300 on its hysteresis loop in Figure 3, it will be driven to point 304. At the end of this positive pulse, it will return to zero value 306. At the conclusion of the rst positive pulse, current will ow in the following circuit: from ground to rectifier 46, coil 42, resistor 43 to negative pole 44. This is a current ilow through coil 42 in the opposite direction from that of the iirst positive power pulse and iiips or drives the core negatively from point 306 to point 307. At the conclusion of this reverse pulse, the second positive power pulse will again drive the core positively from point 307 through point 300 to point 304, and from thence it will go to 306, after the conclusion of the second positive power pulse. The next action will be another flow of current in the following circuit: from ground, rectifier 46, coil 42, resistor 43, to negative pole 44. Hence, the magnetization of the core will repeatedly traverse the hysteresis loop and the majority of the time the core will be operating on unsaturated portions of the hysteresis loop of Figure 3, and consequently there will be substantially no output. If, however, an input signal is received in coil 45, at a time when the core is at plus remanence point 306, the above described everse current in the circuit comprising ground rectifier 46, coil 42, resistor 43, and negative pole 44, will not drive the core negatively to point 307 as before. In such situation, there will be two opposite magnetizing forces on the core. On the one hand there will be a flow of current in the circuit: ground to rectiiier 46, coil 42, resistor 43, to negative magnetizing force to the core. There will be an additional signal input current in coil 45 tending to apply a positive magnetizng force to the core. These two magnetizing forces will substantially cancel each other and the core will remain at point 306 on the hysteresis loop. Consequently, the next positive power pulse from source 40 will pass through rectifier 41 and coil 42 to the output and will drive the core from point 306 to point 305 on the hysteresis loop. Since the core is substantially saturated throughout this entire period a large pulse out put will appear. The operation of a non-complementing amplifier may be summarized by stating that current flow in coil 42 will drive the core around the hysteresis loop without substantial saturation and therefore without any substantial pulse output until there is a current iiow through coil 45. This will stop thealternating magnetizations of the core, allowing the next power pulse to saturate the core and give a large output. A non-complementing magnetic amplier yields an output signal only in respense to an input signal. The parts 44, 47 and 46 form a sneak suppressor in that they would normally cause a small current to llow from ground through rectifier 46, resistor 47 to negative pole 44 which cancels any small current that may iiow from source 40 through coil 42 during the time when coil 42 has high impedance.

The source 40 preferably goes negative during the pulses; in other words it is a source of square wave alternating current. On the negative half cycle the rectifier 41 is cut-oft' so that reverting current from source 44 will not enter the generator 40 but will flow exclusively through coil 42 and rectitier 45.

Figure 5 is a schematic diagram of a complementing magnetic amplifier suitable for use as amplier 116 of this application. The source 56, of power pulses PP, generates a train of equally spaced square wave alternating current pulses of selected phase. If it be assumed that at the lbeginning of any given positive pulse the core has residual magnetism and flux density as represented on point 306 of the hysteresis loop of Figure 3, the power pulse will drive the core from point 306 to saturation point 305. At the conclusion of the pulse the core magnetization will return to point 306. Successive positive pulses from power source 56 will iiow through rectifier 57, coil 58 and load 59, repeatedly driving the core from positive remanence point 306 to positive saturation point 305. During the interval in which the core is being driven from 306 to 305, the core is operating on a relatively saturated portion of the hysteresis loop, whereby the eiective impedance of coil 58 is low. Hence the power pulses will fiow from source 56 to load 59 without substantial impedance. lf, however, during the interval between two positive power pulses, a positive pulse is received at the input 50, it will pass through coil 51, resistor 52, source 56, to ground. This will magnetize the core negatively driving it from point 306 to point 307. At the conclusion of this negative pulse the core will return to negative remanence point 300. The next positive power pulse from source 56 is just sufficient to drive the core from negative remanence point 300 to point 304. Since this excursion is over a relatively unsaturated portion of the hysteresis loop, the coil 58 will have high effective impedance during this pulse and the resultant current ow will be yvery low. At the conclusion of that pulse the magnetization of the core will return to positive remanence or zero value 306. If no signal appears on the input immediately following the last-named positive power pulse, the next positive power pulse will drive the core to saturation at point 305 and will give a large output at the load 59.

Consequently, it is clear that the magnetic amplifier of Figure will feed large positive pulses to the load in response to each positive pulse from source 56, except that immediately after the receipt of any positive pulse on the input 50 the next positive power pulse will be blocked. This type of a magnetic amplifier is known as a complementing one and is characterized by its yield of an output pulse only in the absence of an input signal.

in order to avoid the appearance at the load 59 of the small current which fiows during the period that a power pulse is driving the core from point 300 to point 304, the elements 53, 54 and 55 may be employed. The negative source 53 passes a current greater than the said small curren through resistor 54 and rectifier 55. This cancels the aforesaid small current, better known as the sneak current, therefore the output lead remains substantially at ground potential as long as rectifier 55 is conducting.

The flow of positive power pulses from source 56 through coil 58 when the latter has high impedance will tend to induce a potential in winding S1 during the positive power pulse period. The potential thus induced in winding 51 tends to cause a current to flow through source 50, winding 51, resistor 52, source 56, to ground. This ow of current is undesirable and is blocked since the positive pulse of source 56 is impressed (through resistor 52) upon the cathodes of rectifiers 48 and 49 whereby these rectifiers are cut off and will not allow liow of current in the circuit of winding 51.

The source 56 preferably goes negative during the space between positive power pulses, in other Words it preferably is a source of square wave alternating current. On the *Y negative half cycle, the negative going excursion of source 56 cuts off rectifier 57 and prevents flow of current from source 50 through rectifier 57 and coil 58 to the load.

Figure 6 is a schematic diagram of one form of the entire apparatus. In this figure, the non-complementing magnetic amplifier 103 has its components numbered with the same reference numbers as are used in connection with Figure 4, except that the subscript a has been added. The non-complementing magnetic amplifier 105 is the same as that shown in Figure 4 and bears like reference numbers, except that the subscript b has been added. The non-complementing magnetic amplifier 127 is the same as that of Figure 4 and bears like reference numbers, except that the subscript "c has been added. The complementing magnetic amplifier 116 is the same as the one of Figure 5 and bears like reference numbers, except that the subscript d has been added. Since the block diagram of Figure l has been described in detail, it is unnecessary to follow the specific circuitry of Figure 6 insofar as that would duplicate the description of Figure 1. All that is necessary to say is that the magnetic amplifiers of Figure 6 perform the functions prescribed for the blocks 103, 105, 116 and 127 of Figure l and that the circuit arrangement would be as shown. lt is believed that anyone skilled in the art can understand Figure 6 completely in view of what has already been described in this application; and moreover, the block diagram of Figure l is a complete showing in any event, since those skilled in the art could obviously insert any of several types of magnetic amplifiers in the places of blocks 103, 105, 116 and 127 in order to obtain the desired results. The invention is, therefore, not limited to the specific form of magnetic amplifiers shown in Figures 4 and 5. The operation of gate 107 will, however, be described for completeness, even though it is a conventional gate. In the absence of pulses on input wires 106 and 117, current from positive pole 60 which is displaced above ground by substantial positive value, flows through resistor 61, rectifiers 62 and 65, to resistors 63 and 66, to negative poles 64 and 67 which are displaced below ground by a substantial amount. As a result, the junction 69 is held at approximately ground potential. This follows from the fact that the potential drop across resistor 61 is selected so that it is substantially equal to the positive potential of source 60 and the potentials across resistors 63 and 66 are substantially equal to the negative potential of poles 64 and 67. If a pulse appears on wire 117 without a concurrent pulse appearing on wire 106, the cathode of rectifier 62 is raised to a positive value so that the rectifier 62 is cut oi. This, however, does not allow current to flow from the source 60 through rectifier 68 to the set input 102, because the rectifier 65 is not cut off and current will flow from positive pole 60 through resistors 61 and 66 to the negative pole 67. In this case the potential drop across resistor 61 is substantially equal to the potential of positive pole 60 and the potential drop across resistor 66 is substantially equal to the negative potential of pole 67 Hence, junction 69 remains at substantially ground potential and there is no current flow past junction 69 through rectifier 68 to input 102. However, if pulses appear simultaneously on wires 106 and 117, the voltage level at the cathodes of both of rectifiers 62 and 65 increases in positive values to cut off. Hence, in eiect the right-hand end of resistor 61 is disconnected from the negative poles 64 and 67, junction 69 is freed from ground and therefore current may now flow from positive pole 60 through resistor 61, junction 69 and rectifier 63 to input 102, and thereby establish a pulse of current in the input signal coil 45a. This input pulse will continue only so long as there are positive potentials concurrently on wires 106 and 116. In practice resistors 63 and 47C may be combined as could 66 and 47b.

While there has been described what are at present believed to be preferred forms of the invention, many variations willV be suggested to those skilled in the art by the above disclosure. The appended claims are intended to cover in generic terms all those equivalent structures which fall within the spirit of the invention.

I claim to have invented:

l. In combination in a monostable device, a first non- Y complementing magnetic amplifier supplied with a train of first phase power pulses, a second non-complementing magnetic amplifier supplied with a train of second phase power pulse input, a first circuit means connecting the output of said first amplifier to the input of said second amplifier, a second circuit means connecting the output of said second amplifier to the input of said first amplifier, one of said circuit means comprising an input means and a gating means, the other of said circuit means comprising an output means, a reactor comprising a saturable magnetic core with a substantially rectangular characteristic hysteresis loop, a primary winding and a secondary winding, a third non-complementing magnetic amplifier supplied with a train of second phase power pulses, a complementing magnetic amplifier supplied with a train of second phase power pulses, said primary winding having one terminal connected to said output means and the other terminal connected to the inputs of said third non-complementing magnetic amplifier and said complementing magnetic amplifier, a source of blocking pulses, said secondary winding being connected to the output of said third noncomplementing amplifier and to said source of blocking pulses, the output of said complementing amplifier being connected to said gating means, said reactor core being of such size and material that a plurality of pulses are required to saturate it whereby a plurality of output pulses are produced at said output means in response to each input signal.

2. The combination set forth in claim 1, an impedance having one terminal connected to a negative voltage source and the other connected to the junction of said secondary winding and said source of blocking pulses to form therewith a clamping subcircuit serving to limit the action of voltages induced in said secondary winding.

3. In combination in a monostable device, a first noncomplementing magnetic amplifier supplied with a train of first phase power pulses, a second non-complementing magnetic amplifier supplied with a train of second phase power pulses, a first circuit means connecting the output of said first amplifier with the input of said second amplifier and a second circuit means connecting the output of said second amplifier to the input of said first amplifier, one of said circuit means having an input means for the device and the other of said circuit means having an output means for the device, whereby a single pulse applied to said input means initiates a chain of pulses at said output means and a third circuit means connected to said output means and responsive to a predetermined number of output pulses to terminate said chain of pulses in said circuit means having said output means.

4. The combination set forth in claim 3, said third circuit means comprising an element having the power to absorb a predetermined number only of said output pulses and then acting to break the train of output pulses.

5. The combination set forth in claim 4, said element comprising a saturable core reactor, said core characteristically charging pulse-by-pulse to saturation in response to the pulses fed thereto, said third circuit means comprising a complementing magnetic amplifier having its input connected to said transformer and its output connected to that circuit means having the input means for the device whereby to interrupt one said output-to-input connection between said first and second amplifiers.

6. In combination a pair of non-complementing magnetic amplifiers having their outputs and inputs interconnected to produce a continuing series of pulses in response to a single set input signal, an electrical circuit element having the capacity to absorb a predetermined number of said pulses only and thereafter to transmit the next succeeding pulse in excess of said number and circuit means responsive to said excess pulse for interrupting said continuing series of pulses.

7. In combination a pair of non-complementing magnetic amplifiers having their outputs and inputs cross-connected to produce a continuing series of output pulses in response to a single set input signal, an interrupting circuit connecting said cross-connections and comprising a saturable reactor having a core constructed to require a predetermined number of said output pulses to produce saturation and thereafter to pass the next succeeding pulse, and means responsive to receipt of said next succeeding pulse for interrupting said continuing series of output pulses.

8. The combination set forth in claim 7, said lastnamed means comprising a gate forming part of said cross-connection and arranged to interrupt said crossconnection in response to the action of said next succeedng pulse.

9. in combination in a monostable device, a first noncomplementing amplifier, a second non-compiementing amplifier, a. first circuit means having a gate and an input to the device and connecting the output of one of said amplifiers to the input of the other, a second circuit means having an output for the device and connecting the output of the other of said amplifiers to the input of the said one of the amplifiers, said amplifiers being constructed to produce a circulating series orr pulses through said gate and to said output and a third circuit means connected to the output of said device and to said gate and responsive to a predetermined number of pulses in said output to actuate said gate and terminate said circulating series of pulses.

l0. The combination set forth in claim 9, said third circuit means comprising reactor having a saturable core, said core having a substantially rectangular characteristic hysteresis loop and responsive to said output puises, said predetermined number of which will drive said core to saturation step-by-step.

ll. The combination set forth in claim lt), said third circuit means comprising a third non-complementing magnetic amplifier, a source of blocking pulses, the primary of said reactor having one terminal connected to said device output and the other terminal connected to the input of said third amplifier and the secondary of said reactor having one terminal connected to said source of blocking pulses and the other terminal connected to the output of said third amplifier.

l2. The combination set forth in claim ll, said third circuit means comprising a complementing magnetic amplifier having its input connected to the same terminal of said primary winding as that of said third amplifier and having its output connected to said gate whereby the saturation of said core produces an input to said complementing amplifier and causes said gate to interrupt said circulating series of pulses after said predetermined number of output pulses.

13. The combination set forth in claim 9, said third circuit means comprising an electrical circuit element having the capacity to absorb said predetermined number of output pulses and thereafter to transmit the next succeeding pulse in excess of said number to actuate said gate.

14. The combination set forth in claim 13, said electrical circuit element being a reactor with a saturable core and having its primary winding connected to said output for the device.

No references cited. 

